differing bits in Q/S NaNs

I'd write them out, "quiet and signaling NaNs".

https://www.ibm.com/docs/en/openxl-fortran-aix/17.1.2?topic=overview-infinities-nans

the above page refers to bit patterns

https://anniecherkaev.com/the-secret-life-of-nan

Annie Cherkaev
Mar 2018

quiet and signaling NaNs

deferring to a Member on this one

but if I read the content of the previous comment's cited webpages correctly then perhaps

        # avoid testing, due to different bit patterns in quiet and signaling NaNs

@seiko2plus

cf: comment on NaNs

Have you any opinion on herein proposed rewording?

numpy/_core/tests/test_half.py

the dumped comment lines from the file otherwise look good excepting the following

is been
calculations tries
mid points

$ ed -s numpy/numpy/_core/tests/test_half.py <<<'25p'
        # NaN value can cause an invalid FP exception if HW is been used
$ ed -s numpy/numpy/_core/tests/test_half.py <<<'122,126p'
        # The above calculations tries the original values, or the exact
        # mid points between the float16 values. It then further offsets them
        # by as little as possible. If no offset occurs, "round to even"
        # logic will be necessary, an arbitrarily small offset should cause
        # normal up/down rounding always.
$ 

@DimitriPapadopoulos, @musvaage Thank you a lot for covering my typos.

Have you any opinion on herein proposed rewording?

Not really, but the current rewording is ideal to me:

# avoid testing NaNs due to differing bit patterns in Q/S NaNs

@mattip and @rkern

Thanks for the review on one of the predecessor PRs.

this is only for my records

BUG: Fix build on ppc64 when the baseline set to Power9 or higher #24806
charris merged 4 commits on Nov 7, 2023

cf: ENH, TST: Modify half-precision tests to deal with FP HW exceptions

MAINT: fix typos #27344
charris merged 1 commit on Sep 11, 2024

MAINT: Fix a few typos - and sometimes improve wording #27376
charris merged 1 commit on Sep 11, 2024

Thanks @DimitriPapadopoulos