Pull requests

• Fix the arm32 esil flags of adds, subs, rsbs, adcs, sbcs, rscs, cmp and cmn ##esil

  #27258·bacescuandrei opened Oct 28, 2026Contributor·

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• Fix the arm32 esil of rrx shifted register operands ##esil

  #27257·bacescuandrei opened Oct 28, 2026Contributor·

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• Wrap the lea address at the address size with a 0x67 prefix ##esil

  #27256·bacescuandrei opened Oct 28, 2026Contributor·

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• Fix aarch64 RELATIVE import addresses doubling the link base ##bin

  #27255·phix33 opened Oct 28, 2026Collaborator·2 of 3 tasks·

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• Fix arm64 fabs ESIL negating positive doubles ##esil

  #27254·phix33 opened Oct 28, 2026Collaborator·2 of 3 tasks·

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• Fix reloc names when ELF symbols come from PT_DYNAMIC ##bin

  #27253·phix33 opened Oct 28, 2026Collaborator·2 of 3 tasks·

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• Test Thumb movw against an ARM-mode function target ##test

  #27252·phix33 opened Oct 28, 2026Collaborator·2 of 3 tasks·

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• Patch riscv64 dynamic relocs when relocs are applied ##bin

  #27251·phix33 opened Oct 28, 2026Collaborator·2 of 3 tasks·

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• List s390 R_390_32 relocs in ir ##bin

  #27250·phix33 opened Oct 28, 2026Collaborator·2 of 3 tasks·

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• Fix x86.nz test with an immediate operand ##arch

  #27249·jayhemnani9910 opened Oct 28, 2026Contributor·2 of 3 tasks·

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• Fix x86.nz mov of an immediate to memory ##arch

  #27248·jayhemnani9910 opened Oct 28, 2026Contributor·2 of 3 tasks·

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• Fix x86.nz memory offset sign when a negative immediate follows ##arch

  #27247·jayhemnani9910 opened Oct 28, 2026Contributor·2 of 3 tasks·

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• Walk MIPS delay slots before branch arg recovery ##analysis

  #27246·phix33 opened Oct 28, 2026Collaborator·2 of 3 tasks·

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• Fix ar printing of 512-bit registers like zmm0 ##core

  #27245·phix33 opened Oct 28, 2026Collaborator·2 of 3 tasks·

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• Fix x86 andn esil and add esil for the bmi and adx instructions ##esil

  #27244·bacescuandrei opened Oct 28, 2026Contributor·

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• Add arm64 MOVW_UABS and unsupported MOVW_SABS reloc test ##test

  #27243·phix33 opened Oct 28, 2026Collaborator·2 of 3 tasks·

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• Fix arm64 esil for cls, smnegl, umnegl and the V flag of 32-bit subs ##esil

  #27242·bacescuandrei opened Oct 28, 2026Contributor·

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• Route graph edge bends as constrained channels ##graph

  #27236·trufae opened Oct 28, 2026Collaborator·3 tasks·

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• Fix ELF extended section numbering (e_shnum=0 / e_shstrndx=SHN_XINDEX)

  #27229·kaii-k opened Oct 28, 2026·

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• Apply relocs by default ##bin

  #27223·phix33 opened Oct 27, 2026Collaborator·2 of 3 tasks·

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  · 6.2.8
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• Keep Thumb branches to ARM-state functions unpatched ##bin

  #27179·phix33 opened Oct 25, 2026Collaborator·2 of 3 tasks·

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• Don't detect prelink-less arm64 kernel images as kernelcaches ##bin

  #27173·notJiaT75 opened Oct 25, 2026Contributor·2 of 3 tasks·

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• [TBD] Add jsc bytecode compilation and LZ4 script loading

  #27166·trufae opened Oct 24, 2026Collaborator·

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• Add a sig column to ii, and a sig field to iij ##bin

  #27163·jayhemnani9910 opened Oct 24, 2026Contributor·2 of 3 tasks·

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• Document OrcaRouter Cyber Inference as a jslinux AI upstream ##doc

  #27156·putraperdana1207-pixel opened Oct 23, 2026·

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