Add Intel XPU support for CogACT inference by the-talos · Pull Request #51 · microsoft/CogACT · GitHub
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Add Intel XPU support for CogACT inference - #51

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Talos (the-talos) wants to merge 1 commit into
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the-talos:xpu-support
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Talos (the-talos) wants to merge 1 commit into
microsoft:mainfrom
the-talos:xpu-support

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Summary

  • Add vla/device.py: detection order XPU, then CUDA, then CPU, and resolve_device() where an explicit device is always honoured.
  • The mixed precision context in predict_action and predict_action_batch was hard-coded to "cuda". It now follows the device the model sits on (a new CogACT._autocast). On CUDA nothing changes, and on CPU autocast stays off as before.
  • sim_cogact/cogact_policy.py moves the model to resolve_device() instead of "cuda", which keeps cuda on a CUDA host.
  • README: one subsection, "How to run the same on Intel's XPU", directly under the install steps (XPU torch wheel, skip Flash Attention, ZE_AFFINITY_MASK).
  • New tests/test_device_agnostic.py.

What I ran

  • Existing tests: the repo has none. New tests: 7 passed with an XPU; 6 passed and 1 skipped with the XPU hidden (exit code 0). They cover detection order, explicit device wins, autocast dispatch per device (mocked), and a DDIM sampler parity test on a DiT-S with re-randomised weights (CPU against XPU).
  • Real checkpoint parity, CogACT/CogACT-Base loaded through load_vla with the Prismatic SigLIP and DINOv2 backbones, backbone (the vlm module) in bf16 and action head in fp32 as in the README snippet, a structured 256x256 image, the instruction "pick up the red block", fractal20220817_data, cfg_scale=1.5, 3 DDIM steps, the same noise drawn on CPU and moved to the device. The (16, 7) action chunk, Intel Arc Pro B60 (torch 2.14.1+xpu, transformers 4.40.1) against CPU bf16: MSE 9.37e-08, relative MSE 4.08e-05, max abs diff 2.06e-03, 100% inside atol 2e-2 and rtol 1e-2, cosine 0.99998. For scale, CPU bf16 against CPU fp32 gives MSE 8.03e-08, relative MSE 3.49e-05, max abs diff 2.16e-03; XPU bf16 against CPU fp32 gives MSE 1.75e-07, relative MSE 7.60e-05, max abs diff 2.64e-03, 100% inside tolerance.
  • The CPU bf16 reference needs the pixel values cast to bf16 by hand, because autocast stays off on CPU as before. This is only in my parity script.

Notes

  • Not covered: the SIMPLER simulator stack (CUDA), the other scripts outside vla/. No Flash Attention is used on this path.
  • The Prismatic code comes from the external openvla package named in pyproject.toml; it imports tensorflow, tensorflow_datasets and dlimp at import time, so those must be importable. I ran with transformers 4.40.1 and timm 0.9.10 as pinned there.
  • The Llama-2 tokenizer repo is gated, so for the parity run I used a local copy of the config and tokenizer from an ungated mirror under the expected repo id. All model weights come from the CogACT-Base checkpoint with a strict load.

Add vla/device.py (XPU, then CUDA, then CPU; an explicit device always wins),
make the mixed precision context in predict_action and predict_action_batch
follow the device of the model, and let the SIMPLER policy wrapper pick the
default device. Add mocked tests and an XPU sampler parity test, and a README
subsection with the XPU install and run steps.
@the-talos

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