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1. minimax minimax Public

   Minimax: a Compressed-First, Microcoded RISC-V CPU

   Verilog 226 12

2. pyxsi pyxsi Public

   Python/C/RTL cosimulation with Xilinx's xsim simulator

   C++ 77 20

3. awaitless awaitless Public

   ipython + REPL + coroutines - suffering

   Python 21

4. tuberd tuberd Public

   Seamlessly expose Python (or native C++) code across a LAN using something like JSON-RPC

   Python 1 3

5. mr.scrub mr.scrub Public

   An open-source, ECC-based internal scrubber for Xilinx UltraScale FPGAs

   Verilog 4 1

6. t0/rfmux t0/rfmux Public

   python API to the CRS boards

   Python 1