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Professional electronics and FPGA developer.
Network protocol libraries for VHDL test benches
VHDL 13 2
Power tree analysis of circuits, boards and systems.
Python 3
LTspice simulations with Docker in CI pipeline
Python 1 1
Modelling and simulation of an FPGA-controlled buck converter in VHDL
VHDL 1
Trained models and related files for the Arthropod Taxonomy Orders object detection dataset
Helper functions for images annotated with VOTT
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