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A FPGA Based CNN accelerator, following Google's TPU V1.
C++ 175 42
Low Density Parity Check codes encoder and decoder, in particular for CCSDS standards.
MATLAB 68 21
Full piplined LDPC decoder (IEEE 802.16e) implement in FPGA using Xilinx HLS(C synthesis to Verilog Codes)..
C++ 45 20
convolution codes simulation, decoder using the viterbi algorithm.
MATLAB 11 7
3 1
Forked from fpgasystems/fpga-network-stack
Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)
C++ 2
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