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Simplified Data Encryption Standard Encryption algorithm implemented on FPGA using Verilog Language.
Verilog 2 1
A 21-bit Softcore custom FPGA-Based Microprocessor based on Altera de1-soc FPGA kit
Verilog 1 1
Arduino project to receive and transmit raw Infrared packets
Arduino
Forked from agural/FPGA-Oscilloscope
Design, Documentation, Schematic, Board, Code files for the FPGA Oscilloscope project using an Altera Cyclone III FPGA.
VHDL
StackExchange websites Crawler script
Python 1 1
A Facebook pages/groups crawler
Python 2 1
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