stm32/i2cslave: Pass I2C instance to callbacks to support multi I2Cs.

dpgeorge · dpgeorge · commit 137df817575e · 2020-06-26T23:56:45.000+10:00
By passing through the I2C instance to the application callbacks, the
application can implement multiple I2C slave devices on different
peripherals (eg I2C1 and I2C2).

This commit also adds a proper rw argument to i2c_slave_process_addr_match
for F7/H7/WB MCUs, and enables the i2c_slave_process_tx_end callback.
Mboot is also updated for these changes.

Signed-off-by: Damien George &lt;damien@micropython.org&gt;
diff --git a/ports/stm32/i2cslave.c b/ports/stm32/i2cslave.c
@@ -42,20 +42,20 @@ void i2c_slave_ev_irq_handler(i2c_slave_t *i2c) {
         // Read of SR1, SR2 needed to clear ADDR bit
         sr1 = i2c->SR1;
         uint32_t sr2 = i2c->SR2;
-        i2c_slave_process_addr_match((sr2 >> I2C_SR2_TRA_Pos) & 1);
+        i2c_slave_process_addr_match(i2c, (sr2 >> I2C_SR2_TRA_Pos) & 1);
     }
     if (sr1 & I2C_SR1_TXE) {
-        i2c->DR = i2c_slave_process_tx_byte();
+        i2c->DR = i2c_slave_process_tx_byte(i2c);
     }
     if (sr1 & I2C_SR1_RXNE) {
-        i2c_slave_process_rx_byte(i2c->DR);
+        i2c_slave_process_rx_byte(i2c, i2c->DR);
     }
     if (sr1 & I2C_SR1_STOPF) {
         // STOPF only set at end of RX mode (in TX mode AF is set on NACK)
         // Read of SR1, write CR1 needed to clear STOPF bit
         sr1 = i2c->SR1;
         i2c->CR1 &= ~I2C_CR1_ACK;
-        i2c_slave_process_rx_end();
+        i2c_slave_process_rx_end(i2c);
         i2c->CR1 |= I2C_CR1_ACK;
     }
 }
@@ -77,22 +77,22 @@ void i2c_slave_ev_irq_handler(i2c_slave_t *i2c) {
         // Set TXE so that TXDR is flushed and ready for the first byte
         i2c->ISR = I2C_ISR_TXE;
         i2c->ICR = I2C_ICR_ADDRCF;
-        i2c_slave_process_addr_match(0);
+        i2c_slave_process_addr_match(i2c, (i2c->ISR >> I2C_ISR_DIR_Pos) & 1);
     }
     if (isr & I2C_ISR_TXIS) {
-        i2c->TXDR = i2c_slave_process_tx_byte();
+        i2c->TXDR = i2c_slave_process_tx_byte(i2c);
     }
     if (isr & I2C_ISR_RXNE) {
-        i2c_slave_process_rx_byte(i2c->RXDR);
+        i2c_slave_process_rx_byte(i2c, i2c->RXDR);
     }
     if (isr & I2C_ISR_STOPF) {
         // STOPF only set for STOP condition, not a repeated START
         i2c->ICR = I2C_ICR_STOPCF;
         i2c->OAR1 &= ~I2C_OAR1_OA1EN;
         if (i2c->ISR & I2C_ISR_DIR) {
-            // i2c_slave_process_tx_end();
+            i2c_slave_process_tx_end(i2c);
         } else {
-            i2c_slave_process_rx_end();
+            i2c_slave_process_rx_end(i2c);
         }
         i2c->OAR1 |= I2C_OAR1_OA1EN;
     }
diff --git a/ports/stm32/i2cslave.h b/ports/stm32/i2cslave.h
@@ -67,9 +67,10 @@ static inline void i2c_slave_shutdown(i2c_slave_t *i2c, int irqn) {
 void i2c_slave_ev_irq_handler(i2c_slave_t *i2c);
 
 // These should be provided externally
-int i2c_slave_process_addr_match(int rw);
-int i2c_slave_process_rx_byte(uint8_t val);
-void i2c_slave_process_rx_end(void);
-uint8_t i2c_slave_process_tx_byte(void);
+int i2c_slave_process_addr_match(i2c_slave_t *i2c, int rw);
+int i2c_slave_process_rx_byte(i2c_slave_t *i2c, uint8_t val);
+void i2c_slave_process_rx_end(i2c_slave_t *i2c);
+uint8_t i2c_slave_process_tx_byte(i2c_slave_t *i2c);
+void i2c_slave_process_tx_end(i2c_slave_t *i2c);
 
 #endif // MICROPY_INCLUDED_STM32_I2CSLAVE_H
diff --git a/ports/stm32/mboot/main.c b/ports/stm32/mboot/main.c
@@ -664,22 +664,22 @@ void i2c_init(int addr) {
     i2c_slave_init(MBOOT_I2Cx, I2Cx_EV_IRQn, IRQ_PRI_I2C, addr);
 }
 
-int i2c_slave_process_addr_match(int rw) {
+int i2c_slave_process_addr_match(i2c_slave_t *i2c, int rw) {
     if (i2c_obj.cmd_arg_sent) {
         i2c_obj.cmd_send_arg = false;
     }
     i2c_obj.cmd_buf_pos = 0;
     return 0; // ACK
 }
 
-int i2c_slave_process_rx_byte(uint8_t val) {
+int i2c_slave_process_rx_byte(i2c_slave_t *i2c, uint8_t val) {
     if (i2c_obj.cmd_buf_pos < sizeof(i2c_obj.cmd_buf)) {
         i2c_obj.cmd_buf[i2c_obj.cmd_buf_pos++] = val;
     }
     return 0; // ACK
 }
 
-void i2c_slave_process_rx_end(void) {
+void i2c_slave_process_rx_end(i2c_slave_t *i2c) {
     if (i2c_obj.cmd_buf_pos == 0) {
         return;
     }
@@ -764,7 +764,7 @@ void i2c_slave_process_rx_end(void) {
     i2c_obj.cmd_arg_sent = false;
 }
 
-uint8_t i2c_slave_process_tx_byte(void) {
+uint8_t i2c_slave_process_tx_byte(i2c_slave_t *i2c) {
     if (i2c_obj.cmd_send_arg) {
         i2c_obj.cmd_arg_sent = true;
         return i2c_obj.cmd_arg;
@@ -775,6 +775,9 @@ uint8_t i2c_slave_process_tx_byte(void) {
     }
 }
 
+void i2c_slave_process_tx_end(i2c_slave_t *i2c) {
+}
+
 #endif // defined(MBOOT_I2C_SCL)
 
 /******************************************************************************/

Original file line number	Diff line number	Diff line change
`@@ -42,20 +42,20 @@ void i2c_slave_ev_irq_handler(i2c_slave_t *i2c) {`
`42`	`42`	`// Read of SR1, SR2 needed to clear ADDR bit`
`43`	`43`	`sr1 = i2c->SR1;`
`44`	`44`	`uint32_t sr2 = i2c->SR2;`
`45`		`- i2c_slave_process_addr_match((sr2 >> I2C_SR2_TRA_Pos) & 1);`
	`45`	`+ i2c_slave_process_addr_match(i2c, (sr2 >> I2C_SR2_TRA_Pos) & 1);`
`46`	`46`	`}`
`47`	`47`	`if (sr1 & I2C_SR1_TXE) {`
`48`		`- i2c->DR = i2c_slave_process_tx_byte();`
	`48`	`+ i2c->DR = i2c_slave_process_tx_byte(i2c);`
`49`	`49`	`}`
`50`	`50`	`if (sr1 & I2C_SR1_RXNE) {`
`51`		`- i2c_slave_process_rx_byte(i2c->DR);`
	`51`	`+ i2c_slave_process_rx_byte(i2c, i2c->DR);`
`52`	`52`	`}`
`53`	`53`	`if (sr1 & I2C_SR1_STOPF) {`
`54`	`54`	`// STOPF only set at end of RX mode (in TX mode AF is set on NACK)`
`55`	`55`	`// Read of SR1, write CR1 needed to clear STOPF bit`
`56`	`56`	`sr1 = i2c->SR1;`
`57`	`57`	`i2c->CR1 &= ~I2C_CR1_ACK;`
`58`		`- i2c_slave_process_rx_end();`
	`58`	`+ i2c_slave_process_rx_end(i2c);`
`59`	`59`	`i2c->CR1 \|= I2C_CR1_ACK;`
`60`	`60`	`}`
`61`	`61`	`}`
`@@ -77,22 +77,22 @@ void i2c_slave_ev_irq_handler(i2c_slave_t *i2c) {`
`77`	`77`	`// Set TXE so that TXDR is flushed and ready for the first byte`
`78`	`78`	`i2c->ISR = I2C_ISR_TXE;`
`79`	`79`	`i2c->ICR = I2C_ICR_ADDRCF;`
`80`		`- i2c_slave_process_addr_match(0);`
	`80`	`+ i2c_slave_process_addr_match(i2c, (i2c->ISR >> I2C_ISR_DIR_Pos) & 1);`
`81`	`81`	`}`
`82`	`82`	`if (isr & I2C_ISR_TXIS) {`
`83`		`- i2c->TXDR = i2c_slave_process_tx_byte();`
	`83`	`+ i2c->TXDR = i2c_slave_process_tx_byte(i2c);`
`84`	`84`	`}`
`85`	`85`	`if (isr & I2C_ISR_RXNE) {`
`86`		`- i2c_slave_process_rx_byte(i2c->RXDR);`
	`86`	`+ i2c_slave_process_rx_byte(i2c, i2c->RXDR);`
`87`	`87`	`}`
`88`	`88`	`if (isr & I2C_ISR_STOPF) {`
`89`	`89`	`// STOPF only set for STOP condition, not a repeated START`
`90`	`90`	`i2c->ICR = I2C_ICR_STOPCF;`
`91`	`91`	`i2c->OAR1 &= ~I2C_OAR1_OA1EN;`
`92`	`92`	`if (i2c->ISR & I2C_ISR_DIR) {`
`93`		`- // i2c_slave_process_tx_end();`
	`93`	`+ i2c_slave_process_tx_end(i2c);`
`94`	`94`	`} else {`
`95`		`- i2c_slave_process_rx_end();`
	`95`	`+ i2c_slave_process_rx_end(i2c);`
`96`	`96`	`}`
`97`	`97`	`i2c->OAR1 \|= I2C_OAR1_OA1EN;`
`98`	`98`	`}`
Original file line number	Diff line number	Diff line change
`@@ -664,22 +664,22 @@ void i2c_init(int addr) {`
`664`	`664`	`i2c_slave_init(MBOOT_I2Cx, I2Cx_EV_IRQn, IRQ_PRI_I2C, addr);`
`665`	`665`	`}`
`666`	`666`
`667`		`-int i2c_slave_process_addr_match(int rw) {`
	`667`	`+int i2c_slave_process_addr_match(i2c_slave_t *i2c, int rw) {`
`668`	`668`	`if (i2c_obj.cmd_arg_sent) {`
`669`	`669`	`i2c_obj.cmd_send_arg = false;`
`670`	`670`	`}`
`671`	`671`	`i2c_obj.cmd_buf_pos = 0;`
`672`	`672`	`return 0; // ACK`
`673`	`673`	`}`
`674`	`674`
`675`		`-int i2c_slave_process_rx_byte(uint8_t val) {`
	`675`	`+int i2c_slave_process_rx_byte(i2c_slave_t *i2c, uint8_t val) {`
`676`	`676`	`if (i2c_obj.cmd_buf_pos < sizeof(i2c_obj.cmd_buf)) {`
`677`	`677`	`i2c_obj.cmd_buf[i2c_obj.cmd_buf_pos++] = val;`
`678`	`678`	`}`
`679`	`679`	`return 0; // ACK`
`680`	`680`	`}`
`681`	`681`
`682`		`-void i2c_slave_process_rx_end(void) {`
	`682`	`+void i2c_slave_process_rx_end(i2c_slave_t *i2c) {`
`683`	`683`	`if (i2c_obj.cmd_buf_pos == 0) {`
`684`	`684`	`return;`
`685`	`685`	`}`
`@@ -764,7 +764,7 @@ void i2c_slave_process_rx_end(void) {`
`764`	`764`	`i2c_obj.cmd_arg_sent = false;`
`765`	`765`	`}`
`766`	`766`
`767`		`-uint8_t i2c_slave_process_tx_byte(void) {`
	`767`	`+uint8_t i2c_slave_process_tx_byte(i2c_slave_t *i2c) {`
`768`	`768`	`if (i2c_obj.cmd_send_arg) {`
`769`	`769`	`i2c_obj.cmd_arg_sent = true;`
`770`	`770`	`return i2c_obj.cmd_arg;`
`@@ -775,6 +775,9 @@ uint8_t i2c_slave_process_tx_byte(void) {`
`775`	`775`	`}`
`776`	`776`	`}`
`777`	`777`
	`778`	`+void i2c_slave_process_tx_end(i2c_slave_t *i2c) {`
	`779`	`+}`
	`780`	`+`
`778`	`781`	`#endif // defined(MBOOT_I2C_SCL)`
`779`	`782`
`780`	`783`	`/******************************************************************************/`